1. Field of the Invention
The present invention relates generally to delayed automatic gain control circuits and, more particularly, to a delayed automatic gain control circuit in which a start point of delayed automatic gain control in a radio frequency amplification section of a tuner is set so as to be generally constant without being influenced by variations in the gain of the tuner, in the gain of an intermediate frequency amplification section and in a gain control characteristic of the intermediate frequency amplification section.
2. Description of the Related Art
In receivers having a tuner, automatic gain control (hereinafter referred to as AGC) is ordinarily performed by supplying an AGC voltage to a radio frequency amplification section and to an intermediate frequency amplification section to limit the change in the level of a detection output due to a large variation in the level of a received signal to a comparatively small value. There is a need to separately set AGC start points in the radio frequency amplification section and the intermediate frequency amplification section where AGC is executed in order to optimize the conditions of signal distortions and noise figures (NF). Accordingly, the receiver is arranged so as to independently set an AGC voltage-gain characteristic of the radio frequency amplification section and an AGC voltage-gain characteristic of the intermediate frequency amplification section. For example, as a circuit suitable for such characteristic setting, a delayed AGC circuit has been used which performs reverse AGC in the intermediate frequency amplification section such as to change the gain in immediate response to a change in an AGC voltage but which performs delayed reverse AGC in the radio frequency amplification section such as to change the gain only when an AGC voltage becomes higher than a predetermined level.
FIG. 4 is a block diagram showing the configuration of an example of such a known delayed AGC circuit, and FIG. 5 is a characteristic diagram showing the relationship between the level of a received signal and AGC voltages in the known delayed AGC circuit shown in FIG. 4.
As shown in FIG. 4, this known delayed AGC circuit is formed by a radio frequency (RF) amplification section 41, a mixing section 42, a local oscillator 43, an intermediate frequency (IF) amplification section 44, a video detection section 45, an AGC voltage generation section 46 and a delayed AGC voltage generation section 47. The RF amplification section 41, the mixing section 42 and the local oscillator 43 form a tuner 40.
The RF amplification section 41 has an input point connected to a receiving antenna 48 through a tuner input terminal 49 and has an output point connected to one of two input points of the mixing section 42. The mixing section 42 has the other input point connected to the local oscillator 43 and has an output point connected to an input point of the IF amplification section 44 through a tuner output terminal 50. The video detection section 45 has an input point connected to an output point of the IF amplification section 44 and has an output point connected to an input point of the AGC voltage generation section 46. The AGC voltage generation section 46 has an output point connected to a control point of the IF amplification section 44 and has another output point connected to an input point of the delayed AGC voltage generation section 47. The delayed AGC voltage generation section 47 has an output point connected to a control point of the RF amplification section 41.
The delayed AGC circuit having the above-described configuration operates as described below.
A signal received by the receiving antenna 48 is supplied to the RF amplification section 41 through the tuner input terminal 49 to be amplified in the RF amplification section 41. The amplified received signal is frequency-mixed in the mixing section 42 with an oscillated signal from the local oscillator 43 to form a frequency-mixed signal which is supplied to the IF amplification section 44 through the tuner output terminal 50. Only a signal in the frequency-mixed signal having a frequency coinciding with the intermediate frequency of the IF amplification section 44 is selectively amplified in the IF amplification section 44 and is thereafter supplied to the video detection section 45. The video detection section 45 performs video detection of the input IF signal and supplies a video detection output to the AGC voltage generation section 46. At this time, the AGC voltage generation section 46 generates a first AGC voltage V.sub.AGC indicated on a curve i in FIG. 5 and a second AGC voltage V.sub.IAGC indicated on a curve ii in FIG. 5. Second AGC voltage V.sub.IAGC is supplied to the IF amplification section 44. The gain of the IF amplification section 44 is controlled according to second AGC voltage V.sub.IAGC. First AGC voltage V.sub.AGC is supplied to the delayed AGC voltage generation section 47. In response to the input first AGC voltage V.sub.AGC, the delayed AGC voltage generation section 47 generates a delayed AGC voltage V.sub.DAGC indicated on a curve iii in FIG. 5. Delayed AGC voltage V.sub.DAGC is supplied to the RF amplification section 41. The gain of the RF amplification section 41 is controlled according to delayed AGC voltage V.sub.DAGC.
As shown in FIG. 5, when the received signal level is low, that is, in the first range below level L.sub.1, the level of the video detection output from the video detection section 45 is comparatively low and voltage output characteristics of the AGC voltage generation section 46 are such that, as the received signal level increases, first AGC voltage V.sub.AGC (curve i) decreases from its maximum value and second AGC voltage V.sub.IAGC (curve ii) also decreases from its maximum value. Although the delayed AGC voltage generation section 47 is supplied with first AGC voltage V.sub.AGC decreasing while the received signal level is increasing, it outputs a maximum constant voltage as delayed AGC voltage V.sub.DAGC (curve iii) since first AGC voltage V.sub.AGC is in a comparatively high range. Consequently, when the received signal level is in the first range, AGC according to the received signal level is executed in the IF amplification section 44 but AGC is not executed in the RF amplification section 41 and the maximum gain of the RF amplification section 41 is maintained.
Next, when the received signal level increases in the second range between level L.sub.1 and level L.sub.2, the video detection output increases with the received signal level and AGC voltage characteristics are such that, as the received signal level increases, first AGC voltage V.sub.AGC (curve i) decreases continuously from its state corresponding to the first range of the received signal level but second AGC voltage V.sub.IAGC (curve ii) is maintained generally constantly at the minimum level. With first AGC voltage V.sub.AGC decreasing into a comparatively low range, the delayed AGC voltage generation section 47 outputs delayed AGC voltage V.sub.DAGC (curve iii) decreasing with first AGC voltage V.sub.AGC, which is decreasing while the received signal level is increasing. Consequently, when the received signal level is in the second range, delayed AGC according to the received signal level is executed in the RF amplification section 41 but AGC in the IF amplification section 44 becomes irresponsive to the change in the received signal level to maintain the minimum gain of the IF amplification section 44.
When the received signal level increases further in the third range above level L.sub.2, the video detection output also increases with the received signal level and AGC voltage characteristics are such that, as the received signal level increases, first AGC voltage V.sub.AGC (curve i) decreases continuously from its state corresponding to the second range of the received signal level while second AGC voltage V.sub.IAGC (curve ii) is maintained generally constantly at the minimum level. With first AGC voltage V.sub.AGC decreasing into the lowest range, the delayed AGC voltage generation section 47 outputs delayed AGC voltage V.sub.DAGC (curve iii) which is maintained generally constantly at a minimum level while the received signal level is increasing. Consequently, when the received signal level is in the third range, delayed AGC in the RF amplification section 41 becomes irresponsive to the change in the received signal level to maintain the minimum gain of the RF amplification section 41. Also, AGC in the IF amplification section 44 is irresponsive to the change in the received signal level and the minimum gain of the IF amplification section 44 is maintained.
As described above, the above-described known delayed AGC circuit selectively performs delayed AGC in the RF amplification section 41 according to the received signal level and selectively performs AGC in the IF amplification section 44 according to the received signal level, thereby obtaining a detection output which is not directly dependent on the received signal level.
Ordinarily, the above-described known delayed AGC circuit varies in the gain of the tuner 40, the gain of the IF amplification section 44, the AGC characteristic of the IF amplification section 44 (the gain attenuation curve corresponding to the change in AGC voltage V.sub.AGC) and so on. Correspondingly, first AGC voltage V.sub.AGC output from the AGC voltage generation section 46, second AGC voltage V.sub.IAGC output from the AGC voltage generation section 46 and/or delayed AGC voltage V.sub.DAGC output from the delayed AGC voltage generation section 47 varies. If delayed AGC voltage V.sub.DAGC varies, the received signal level at which delayed AGC is started in the RF amplification section 41 varies, resulting in failure to obtain the desired AGC characteristic.
A delayed AGC circuit designed to eliminate such a drawback as disclosed in Japanese Utility Model Laid-Open Publication No. 140773/1988, for example, has been developed. This delayed AGC circuit has a variable resistor for compensation for a variation in first AGC voltage V.sub.AGC externally added to the delayed AGC voltage generation section. Delayed AGC voltage V.sub.DAGC is adjusted by using this variable resistor to such a value as to constantly maintain the received signal level at which AGC is started in the RF amplification section.
FIG. 6 is a diagram schematically showing the configuration of a delayed AGC circuit disclosed in Japanese Utility Model Laid-Open Publication No. 140773/1988.
As shown in FIG. 6, this delayed AGC circuit is formed by a tuner 51 including an RF amplification stage (not shown), an IF amplification section 52, a video detection section 53, an AGC voltage generation section 54 and a delayed AGC voltage generation section 55. These component sections correspond to the tuner 40, the IF amplification section 44, the video detection section 45, the AGC voltage generation section 46 and the delayed AGC voltage generation section 47 of the known receiver shown in FIG. 4. The delayed AGC voltage generation section 55 has a differential amplification stage formed by transistors 56 and 57, an input stage formed by an emitter-follower transistor 58, an output stage formed by a common-emitter transistor 59, a collector resistor 60 and so on. A variable resistor 61 for adjusting the delayed AGC voltage, a resistor voltage divider 62 and other parts are externally added to the delayed AGC voltage generation section 55.
The operation of the delayed AGC circuit disclosed in Japanese Utility Model Laid-Open Publication No. 140773/1988 is substantially the same as that of the known AGC circuit shown in FIG. 4 except for the internal operation of the delayed AGC voltage generation section 55. Therefore, only the operation of the delayed AGC voltage generation section 55 will be described below.
In the delayed AGC voltage generation section 55, AGC voltage V.sub.AGC output from the AGC voltage generation section 54 is applied to the base of the transistor 56 forming the differential amplification stage through the emitter-follower transistor 58, and bias voltage V.sub.B obtained in accordance with the setting of the delayed AGC voltage adjusting variable resistor 61 is applied to the base of the other transistor 57 forming the differential amplification stage. Bias voltage V.sub.B is set so that V.sub.B =V.sub.AGC -V.sub.be56 (V.sub.be56 : the base-emitter voltage of the transistor 56).
When the received signal level is comparatively low (at the time of weak field input), AGC voltage V.sub.AGC has such a large value that the transistor 56 is on, the transistor 57 is off and the output-stage transistor 59 is on, so that a maximum terminal voltage is generated across the collector resistor 60 by the current passing through the collector resistor 60. At this time, the maximum terminal voltage is supplied to the RF amplification stage of the tuner 51 through the resistor voltage divider 62, thereby maximizing the gain of the RF amplification stage.
When the received signal level becomes higher (at the time of medium field input), AGC voltage V.sub.AGC becomes lower, and the transistor 56 is changed from the completely-on state to an intermediate on state. Simultaneously, the output-stage transistor 59 is changed from the completely-on state to an intermediate on state to reduce the current passing through the collector resistor 60, so that the terminal voltage across the collector resistor 60 decreases. The decreasing terminal voltage is supplied to the RF amplification stage of the tuner 51 through the resistor voltage divider 62. The gain of the RF amplification stage is thereby reduced from the maximum value toward the minimum value.
When the received signal level becomes much higher (at the time of strong field input), AGC voltage V.sub.AGC has such a value that the transistor 56 is off, the transistor 57 is on and the output-stage transistor 59 is off, so that the current passing through the collector resistor 60 is zero. A minimum terminal voltage (zero voltage) is thereby generated across the collector resistor 60. At this time, the minimum terminal voltage is supplied to the RF amplification stage of the tuner 51 through the resistor voltage divider 62, thereby minimizing the gain of the RF amplification stage.
Thus, in the above-described delayed AGC circuit disclosed in Japanese Utility Model Laid-Open Publication No. 140773/1988, if the delayed AGC voltage adjusting variable resistor 61 is adjusted to set the bias voltage V.sub.B to a predetermined value, the received signal level at which AGC is started in the RF amplification stage of the tuner 51 can be constantly maintained with respect to each of variations in the gain of the tuner, the gain of the IF amplification stage 52 and the AGC characteristic of the IF amplification stage 52.
Although the above-described delayed AGC circuit disclosed in Japanese Utility Model Laid-Open Publication No. 140773/1988 can be adjusted so that the received signal level at which AGC is started in the RF amplification stage of the tuner 51 is constant with respect to each of variations in the gain of the tuner, the gain of the IF amplification stage 52 and the AGC characteristic of the IF amplification stage 52, it is necessary to operate the delayed AGC voltage adjusting variable resistor 61 for such individual adjustment. Also, the delayed AGC voltage generation section 55 having the delayed AGC voltage adjusting variable resistor 61 externally attached has a complicated circuit configuration.